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Volume 5 - Number 1 -- Spring 1997

Updated 8/6/97

[Rumors ] [Decipherings] [Editorial]
[Coming Events] [New Products]
[1 to 16 bit Universal PN Generator] [HAM RADIO SST Block Diagrams]

[Part 2]

Part 1
SSS is proud to bring you our third online issue!

RUMORS & RAMBLINGS

  • MAXIM Integrated Products, Inc., Sunnyvale, CA has released several new noteworthy Silicon Chips and Chipsets. Their new PWT1900 Chipset is intended for PCS Phone and WLL apllications where TAG-6 and / or DECT standards are used. They also announced the MAX2511 wide dynamic range IF transceiver chip and the low cost MAX26XX family of 1 GHz RF Amplifiers with shutdown and bias control. For more info check their WEB site at: http://www.maxim-ic.com

  • ROOT Inc., Tokyo, Japan has released its RZ95001 model 2.4 GHz ISM band SS Data Communication Modem. Using the STEL-2000A the radio is capable of up to 2 Mbps in burst mode packet wireless communications. For more info check their WEB site at: http://www.root-hq.com

  • OTC Telecom's AirEZY 900 MHz SS products are now available off the shelf in "bubble pack" form at NCA and other Silicon Valley merchants. Apparently OTC thinks that consumers should have easy access to their SS products. For more info check their WEB site at: http://www.ezylink.com/

  • Even though PROXIM of Mountain View, CA has had trouble with getting acquired, it continues to make strategic alliances with key industry players. They recently were selected by HBO & Company to supply 2.4 GHz Wireless SS technology for the healthcare industry. PROXIM also made a deal with Data General Corporation using the RangeLAN2 for future mobile computing systems. For more info check their WEB site at: http://www.proxim.com/

  • AVISTA DESIGN SYSTEMS of Folsom,CA recently released version 1B of their Avista Spectra/XL analog circuit design / simulation software. This very capable software performs a "what if" function for many demanding linear and non-linear circuit simulations under the Microsoft EXCEL spreadsheet. In their December 5, 1996 issue, EDN magazine announced the "Hot 100 Products of 1996" based on tracking data from their readers. This software was selected for this "best of the best" list of innovative products. Also in the December 1996 issue, EE Product News announced the "Products of the Year" selected as the "best in terms of technological advancement, price/performance, applications potential..." from tens of thousands of new product announcements. Avista Design Systems' Spectre/XL software was selected for the CAE/CAD Software category. For more info check their WEB site at: http://www.avista.com AVISTA has also announced the soon to be released VISIO TECHNICAL software for schematics and simulation -- for more info on VISIO check their WEB site at: http://www.visio.com

  • Stanford Telecom, Sunnyvale, CA recently introduced the STEL-9258 board-level next generation VSAT broadband receiver. For more info check their WEB site at: http://www.stelhq.com/

  • Strategies Unlimited of Mountain View, CA just released a new study report on the GaAs Device Market that forecasts the business to exceed $2 billion in the year 2000. For more information or to order the report email Mr. George Bechtel, Director, Wireless Program at: strtultd@ix.netcom.com.

  • Go DSP, Toronto, Ontario, Canada has released its CODE COMPOSER software for DSP software development. This powerful DSP development environment makes it easy to develop, de-bug and test new DSP code for a variety of platforms. For more info check their WEB site at: http://www.go-dsp.com/

SEND US YOUR "RUMORS" or Comment on "RUMORS" here!

Decipherings

Men stumble over the truth from time to time,
but most pick themselves up and hurry off
as if nothing happened.

Sir Winston Churchill

Editorial

Here it is -- our THIRD online issue! Of course, we're a little late (again) with it! Better late than never they say. . . .





Randy Roberts, Editor & Publisher, SSS Online
Director, RF/SS Consulting



 

University of Oxford Department for Continuing Education: Rewley House
ANNOUNCING THE 1997 UNIVERSITY OF OXFORD SUMMER ENGINEERING PROGRAMME Following the success of the 1996 Programme, the University of Oxford's Department for Continuing Education and the Department of Engineering Science are offering the 9th annual Summer Engineering Programme. Each year a selection of short courses on state-of-the-art engineering topics are presented.

The 1997 Programme includes short courses in the fields of Digital Communication Systems; Wireless Communication Technology; Electronic Circuits and Systems; Electronic Packaging; Optical Engineering and Non-Technical, Professional Development.

This year's Programme includes presentations from University of Bristol; University of California, USA; University of Surrey; Motorola European Cellular Infrastructure Division; Racal Research; Bell Labs, USA; Signal Consulting Inc, USA; GEC Plessy; AmeriCom Services; Question and Express Packaging Systems Inc, USA. There are contributions also from DigiMedia Vision; Hewlett Packard; Loughborough Sound Images; Plextek Ltd; BBC; University of Liverpool; University of Pennsylvania; Securicor Radiocoms; Aethos; GMMT; KU Leuven-Belgium and independent consultants.

All courses are designed for participants who are graduate level engineers and scientists in industry and are being held between Thursday, 29 May and Friday, 11 July 1997.

Courses will be held at the Department for Continuing Education, the Department of Engineering Science, St Annes College and Regents Park College. Delegates will be offered accommodation in the residential centre belonging to the Department for Continuing Education and in local Oxford hotels.

A detailed brochure with further information on the courses is available now. Please write, telephone, fax or e-mail:

Continuing Professional Development Centre
Department for Continuing Education
67 St Giles
Oxford
OX1 3LU

Tel: 01865 288170 / 288164
Fax 01865 288163
E-mail helen.starkey@conted.ox.ac.uk

Website: http://www.conted.ox.ac.uk


DATES Subject
29-30 May Network Planning, Analysis and Design
2-3 June High Speed Digital Design
2-3 June I. Digital Communications
4-5 June II. Error Control Coding: Theory & Practice
6 June III. Access Technology and Applications
11-12 June Strategic Management of Research & Development Projects
16-17 June Electronic Packaging Technologies: BGA, CSP, Flip Chip, MCM-L
18 June Electronic Packaging Technologies: European perspectives
18-19 June Technical Writing/ Prof. Project Proposals
20 June Web Authorship and Design
23-25 June Digital Signal Processing
25-27 June Surface Mount Technology: Keys to Successful Implementation
26-27 June Spread Spectrum Techniques: Principles and Practice
30 June-1 July Third Generation Personal Communication Networks
2-4 July Advanced Data Compression Techniques for Digital Video and Audio Broadcasting
30 June-4 July RF/Microwave Design
30 June-4 July GSM 900/DCS 1800 Digital Cellular System: Standards, Implementation and Deployment
7-8 July Practical Optical Engineering
7-9 July Design of Analog Integrated Circuits for Mixed-Signal Integrated Systems
7-10 July Modern Digital Wireless Transceiver Design
9-11 July Communication Networks: Fast LANs, Internet, Wireless Networks
10-11 July Advanced Logic Design


Please check our NEW Coming Events Page for other future Short Courses, Symposia and other Special events!

 

New Products

AMI MEETS HIGH DATA RATE REQUIREMENTS HEAD ON

AMI Adds New High Data Rate ICs to the WavePlexTM Family of Wireless Products POCATELLO, Idaho - March 24, 1997 - American Microsystems, Inc. (AMI), a leader in application specific solutions and wireless ICs, unveiled the newest additions to their popular WavePlex family of wireless integrated circuits (ICs).

The SX049 Spread Spectrum Transceiver, the SX048 Spread Spectrum Receive-Only and the SX047 Spread Spectrum Transmit-Only are the first direct sequence spread spectrum (DSSS) ICs developed by AMI specifically for higher data rate wireless applications. Security systems, subway train platform monitors, remote medical systems and oil and mining applications are just a few of the many data, voice and video applications that will benefit from these high data rate baseband solutions.

The SX049 is a high performance, high data rate transceiver containing all the baseband circuitry needed to implement DSSS radios. With data rates from 100 bitslsec (bps) to 16 megabits/sec (Mbps) and PN code lengths up to 2,047 chips/bit, the SX049 offers more flexibility and functionality than any other baseband IC.



Designed to serve as a collection host for a large group of WavePlex transmitters and transceivers, the SX048 features data rates up to 16 Mbps. This highly programmable baseband CMOS IC will simplify the design of DSSS modems.

Offering data rates up to 8 Mbps, the SX047 is designed to interface easily with other WavePlex receivers and transceivers. Multiple SX047 nodes can supply data to a single collector host.

"Higher data rate networks with multiple remote sites may need to monitor individual 'stations' at regular intervals. However, all stations may not be required to receive information," said Rocke Acree, WavePlex products manager. "The SX049, SX047 and SX048 provide the flexibility to meet any network requirement. These high data rate ICs are able to address the specific function required and together create a customized, state-of-the-art data communication network."

Product Specifications

Available in a 52-lead PQFP package, the SX047 Transmit-Only IC allows the user to manage internal transmit functions including the type and length of PN codes, data rates, chipping rates, preamble, transmission protocols, power levels and type of redundancy checks as well as manage the external circuitry for signal transmission.

The SX049 Transceiver and SX048 Receive-Only ICs are available in 68- lead PLCC, 64-lead PQFP and 64-lead TQFP packages. These highly programmable baseband ICs feature message processor receive circuits including the receive PN code generator, receive synchronization and tau-dither tracking loop, integrate dump control, data descrambler, packet decoder and CRC checker.

Each PN code generator consists of two 11-bit PN generators, allowing selection of an "A" code, a "B" code, or a "Gold code" combination of the "A" and "B" codes. These baseband ICs can be programmed and interfaced through a standard 8-bit microcontroller port and have port FIFOs to ease data timing on transmission and reception.

Price and Availability

Samples of the SX049 will be available in March 1997, with volume production scheduled for May 1997. Samples and volume production for the SX047 and SX048 will follow. Volume pricing, for quantities of 10,000 pieces, is currently projected at $23.05 per unit for the SX049, $14.65 for the SX048 and $8.80 per unit for the SX047.

AMI celebrates over 30 years of leadership in application specific solutions through superior semiconductor design and manufacturing processes. The company, based in Pocateilo, Idaho, provides a full range of digital and mixed-signal ASICs, CMOS foundry services, application specific standard products, and high-level integrated solutions through multichip modules.

For more information on AMl's capabilities, write to American Microsystems, Inc., 2300 Buckskin Road, Pocatello, Idaho 83201, or see their WEB site at:
http://www.amis.com


 

Build & Test a 1 to 16 bit Universal PN Generator


By Randy Roberts, RF/SS Consulting


Ever wanted to build a simple SS project to learn something about Spread Spectrum and get Get Your Hands Dirty? Well this project may be just the thing for you. The following text is lifted from our NEW SS How To Page and is the basis for an upcoming PN Trainer Kit.



A picture of this PN Generator built on a digital breadboard with an internal power supply. The unit shown actually has two of these universal PN generators on it, for experimenting with PN code correlation characteristics.


This design generates an arbitrary bit stream from 1 to 16 bits long. To simplify the building and tesing of this design, no programming, no EPROM blowing and no PAL /GAL is required! Just set the desired bit stream length in dip switch S1 and enter the desired "code" into dip switches S2 and S3, one bit at a time. If you enter a PN code into the dip switches, you get the desired PN code at the output. Entering any arbitrary, up to 16 bit long bit stream, will also generate an output, even though it may not be a "real" PN code, since there are no "smarts" provided in this design!

This simple design is based on the old TTL 16 bit multiplexer, the 74150. This part is still available in a few places like Jameco and JDR, so you should be able to find them. The virtue of using this part is that ANY up to 16 bit pattern can be entered via S2 and S3 -- thus generating ARBITRARY 1 to 16 bit patterns for a variety of tests / experiments with PN codes or other digital sequences. We used a 10 MHz TTL 14 pin Dip clock in our prototype, however any clock up to about 20 MHz should work here. Go too fast however, and the 74150 will not keep up!

By the way, the 20 resistor pull ups shown in the schematic below are not at all critical -- use any value between 3.3K and 10K -- but, try to make them all the same value! As shown in the schematic, each IC should have at least one Vcc bypass capacitor of its own. I used six capacitors total -- more are better! Other details of this circuit are not at all critical, especially at the speeds shown here!

U2 is used to divide the frequency of the clock down to 2.5 MHz (or 1/4 of whatever clock you use.) This was done for several reasons, some of which will be explained later. One reason for dividing the clock down by 4:1 is to keep the PN clock rate low enough so that low cost, low speed scopes and other test equipment can be used with this design. The 2.5 MHz PN clock gives us a PN "chip rate" of 2.5 MHz or 2.5 MChips per second. The counted down by 4:1 clock drives the 74HC163 - 1 to 16 bit programmable counter. Note that this counter's length controls the length of the PN stream generated by this design. Just enter the twos-complement of the code length you want on S1 to set the desired sequence length. Note that no master reset is provided on this design -- so you may need to power the circuit down and up again to ensure changed settings on the dip switches are properly timed and input to the circuit.

The schematic of this simple design is shown below. You may download the schematic in either ORCAD CAPTURE .DSN or standard .DXF format by clicking on the appropriate line below the online gif schematic.



Download ORCAD CAPTURE Zipped .DSN schematic file (~10K)

Download Zipped .DXF schematic file (~11K)





A TEK TDS350 Scope picture of the output of this PN Generator. The top trace is the PN stream, the bottom trace is the sync signal (or PN Epoch). This pic was taken with the scope's Bandwidth limited to 20 MHz.





A TEK TDS350 Scope picture of the output of this PN Generator without using U6 to re-time and cleanup PN and Sync. The top trace is the U5-pin 10 signal direct, the bottom trace is the U3-pin 15 signal direct. Note that both traces are noisy and have a few glitches with this setup. U6 was added to give the "cleanest" PN and sync signals possible -- yet retaining the correct timing between PN and Sync (Epoch). This pic was taken with the scope's Bandwidth not limited.





A TEK TDS350 Scope picture of the final output of this PN Generator. The top trace is the PN stream, the bottom trace is the sync signal (or PN Epoch). This pic was taken with the scope's Bandwidth not limited. Note that whatever noise or glitches that are present, are ONLY digital sampling scope "artifacts." The PN code set into the dip switches here is: 010100100110111 -- a 15 bit pattern also known as: 2937HEX. Switch S1 was set for a 1 on its LSB, thus giving a 15 bit long bit stream. Let's try another bit stream: 29B8HEX (or 010100111001000 in binary) -- a Maximal Lebggth Sequence from a 4 bit shift register type PN generator. This pattern is shown below:




A TEK TDS350 Scope picture of the output of this PN Generator with a 15 bit Maximal Linear Sequence output. The top trace is the PN stream, the bottom trace is the sync signal (or PN Epoch). This pic was taken with the scope's Bandwidth limited to 20 MHz.

This circuit design was specifically put together to be able to build up two (nearly identical) 1 to 16 bit PN generators on the same prototype board to enable demonstrations, experiments and tests of correlation, cross-correlation and synchronization techniques. I hope to put together a "PN Training Kit" using this approach that is not only inexpensive, but modular and expandable. This kit will include the ability to change the divide by 4. in the second 1 to 16 bit PN generator, to allow a divide by 3 / 4 / 5 "Incremental Phase Modulator" to be implemented for receive PN synch purposes (now you see why we divided the clock by four in our "basic" design). We'll also provide a VCXO for the second TTL crystal clock. I plan to add both early-late and "Tau Dither" tracking circuitry for baseband PN tracking loop demonstrations. Stay tuned as this kit develops -- perhaps you have some other ideas about what might be included in this "PN Trainer?" PLEASE DROP US AN email, IF YOU DO!


For other great Hands-on SS Project ideas, please see our SS How To Page


Questions, comments or suggestions on anything covered in this column are welcome. Please feel free to share any info or special knowledge you may have. Just drop us an email:



 

Contributions:HAM RADIO SST Block Diagrams


Here is a Detailed Set of Block Diagrams for the Proposed SST Radio for the TAPR SS STA
/ Next Generation FCC, Part 97 - SS Rules

By Randy Roberts, KC6YJY

TOP LEVEL BLK

Top Level SST Block Diagram



OK all you "SS fans" out there -- here are my very latest thoughts on a modular, low cost SS radio design for Ham Radio. The block diagram above shows the top level, sort of interconnection view of the new design that I have in mind. After following the TAPR SS SIG for several months and watching our email from all of you, I have incorporated a few changes to the previous Ham Radio SS schemes.

This design can use either the STEL / ZILOG DSSS baseband chips OR the Harris PRISM baseband chip (HSP3824). Note from the following block diagrams that almost all of the other chips in the Harris PRISM Chipset are used in this design.

The design is modular and flexible enough to allow "a mix and match" of PCBs to allow Frequency Hop Modulations to be used, as well!

Finally, my favorite SS Modulation -- namely "Hybrid" combined DS / FH is easily accommodated in this design, since the Harris Dual PLL synthesizer IC (the HFA3524) can switch up to 50 MHz (at 2.4 GHz) in under 400 microseconds!

Please realize that NOTHING in this design, so far, is "locked in concrete!" In other words, we are very open to suggested improvements, simplifications, etc. This design is intended to overcome some of the criticisms of our previous "ideas" for a Ham Radio SS design. This design is NO LONGER "band specific" -- even though we have shown a concept here for the 2.4 GHz band. Other IF or RF PCBs can be designed and accommodated for many other frequency bands. Also, the scheme presented here allows both DS AND FH modulation formats to be transmitted AND received without worrying about "Band Specific" transverters and their non-linearities, group delay distortions and similar "little" details.

This is just the very first, small introduction to this design -- I plan to add a lot more design description details and related ideas, as time permits!

Please take a look at the concepts presented here -- I'd love to hear from you with constructive criticisms and I'd very much like to hear your ideas! Just drop us an email: or post something on the TAPR SS SIG: ss@tapr.org -- 73 for now!




BB BLK

"Basic" SST Baseband (BB) Block Diagram





PRISM BB BLK

Harris "Prism" Option SST Baseband (BB) Block Diagram





FH MX BB BLK

Frequency Hop MX-COM Option SST Baseband (BB) Block Diagram





FH TI BB BLK

Frequency Hop TI DSP Option SST Baseband (BB) Block Diagram



IF BLK

SST IF Block Diagram



FH IF BLK

SST Frequency Hop Option IF Block Diagram



LO BLK

SST LO Block Diagram



RF BLK
SST RF Block Diagram



Download ALL ORCAD Capture .DSN Block Diagram Files (Zipped ~19K)

Download ALL ORCAD Capture Files [ in .DXF Format ]
Block Diagram Files (Zipped ~26K)




Read Part 2 of this issue


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